Inphi Corp. (NYSE: IPHI) has announced the availability of a pair of 100-Gigabit Ethernet (GbE) CMOS PHYs. Based on Inphi's iPHY architecture announced in March, the IN112510 100GbE CMOS Gearbox and IN012525 100GbE CMOS Clock Data Recovery (CDR) chipsets integrate multiple channels along with transmit and receive functions.
The iPHY IN112510 is a single-chip PHY for 10:4 gearbox applications for 100GbE and OTU4 100G line cards with 25- to 28-Gbps electrical interfaces. According to Inphi other technical features include:
Support of 100GBASE-LR4/ER4 and OTU4 28-Gbps operation for OTL4.4
Optimized for low-latency
Programmable transmit and adaptive receive equalization on all SerDes interfaces with fine granularity and control to enable allow performance that surpasses IEEE CAUI, CEI-11G SR and CEI-28G VSR specifications
Self-test and loopback modes
Eye-scan and monitor on all SerDes receiver interfaces for link margin and stress testing in a lab or production test environment
Package design enables denser line cards
Optimization for CFP2-based line card designs
Single-chip, low power device for optimized CFP modules.
Meanwhile, the iPHY IN012525 CDR offers the following features, according to Inphi:
Support of 100G BASE-LR4/ER4 and OTU4 28-Gbps operation
Programmable transmit and adaptive receive equalization on all SerDes interfaces with fine granularity and control to enable performance that surpasses CEI-28G VSR specifications
Self-test modes
Eye-scan and monitor on all SerDes receiver interfaces for link margin and stress testing
Optimization for CFP2 modules.
Both devices are now sampling, Inphi reveals.
According to Jag Bolaria, senior analyst at The Linley Group, "We are expecting strong growth in the 100GbE market, especially in the enterprise and data center segments, with the advent of smaller form factor, lower power 100G optical modules. When coupled with Inphi's low-power, highly integrated CMOS 100G PHY products, the market's move to high-density 100G systems will become a reality."
October 21, 2011